1. Field of the Invention
This invention pertains broadly to the field of semiconductors. More particularly, the invention pertains to bipolar junction transistors fabricated in silicon on a sapphire substrate. In still greater particularity, this invention pertains to an operational amplifier using bipolar junction transistors fabricated in silicon-on-sapphire.
2. Description of the Related Art
Bipolar junction transistors (BJT's) fabricated in silicon-on-sapphire (SOS) have several distinct advantages over their bulk silicon counterparts. For one, total isolation between electronic devices can be obtained by etching silicon islands into a sapphire substrate. As devices may be completely isolated from each other, latch-up-free operation is possible.
Because of the devices' sapphire insulating substrate, there is a reduction in collector-to-substrate capacitance. This reduced capacitance may give rise to a 12 percent decrease in emitter-coupled-logic (ECL) gate delay. In addition, as all interconnecting lines are on the insulating sapphire substrate, the lines contribute little parasitic capacitance and permit high-voltage and high-frequency components to exist in close proximity.
It is also known that devices fabricated in SOS show that radiation-induced photocurrents are three orders of magnitude lower than in bulk silicon, making a very radiation-hard technology suitable for use in transient ionizing radiation and cosmic ray environments.
Bipolar junction transistors have been fabricated in silicon-on-sapphire films with a varying degree of success. Most of the development of BJT's in SOS have been concentrated in the area of lateral BJT's, epitaxial silicon grown BJT's and heteroepitaxy BJT's. This work has been recorded respectively by Prahalad K. Vasudev in his July 1987 article of IEEE Circuits and Devices magazine titled "Recent Advances in Solid-Phase Epitaxial Recrystallization of SOS with Applications to CMOS and Bipolar Devices", July 1987, pp. 17-19; by Heiman, F. P. and P. H. Robinson, in their Solid State Electronics article titled "Silicon-on-Sapphire Epitaxial Bipolar Transistors" of 1968, Volume 11, pages 411-418; and by Cartagena, E. N., B. W. Offord, and G. Garcia, in their article "Bipolar junction transistors fabricated in silicon-on-sapphire" printed in Electronics Letters, Volume 28, Number 11, pages 983-985 of May 21, 1992.
The success of SOS devices has in part been dependent upon the quality of the silicon starting material. For example, high emitter-to-collector leakage current has been experienced due to excessive recombination in the device-based emitter regions and due to emitter collector shorts. Further leading to excessive leakage current is the use of drive-in diffusion to fabricate the bipolar junction transistors. The high temperatures involved and the often excessive driving of a dopant on an emitter are two characteristics of drive-in diffusion considered to contribute to the high leakage current.
Because of the high leakage current exhibited by the BJT's, the pursuit of analog and digital applications on SOS films has been deterred. This has been particularly true in the fabrication of operational amplifiers utilizing bipolar junction transistors made in silicon-on-sapphire. Lateral device operational amplifiers have been fabricated; however, the slow speed of these lateral devices and the difficulty in manufacturing the devices in a reliable manner have permitted the construction of operational amplifiers of only small operating bandwidths. These devices also suffer from the high current leakage described above. Such limitations have made further pursuit of lateral device operational amplifiers constructed of bipolar junction transistors fabricated in silicon-on-sapphire films unfeasible.
The more rapid speed of vertical devices have made them attractive for use in operational amplifiers; however, the use of vertical bipolar junction transistors fabricated in silicon-on-sapphire has not been seriously considered because of the high leakage current plaguing these devices.
Recent successes in improving the quality of silicon starting material by recrystallization techniques have now made Silicon-on-Sapphire a desirable candidate material for BJTs. One such process, known as the double solid phase epitaxy (DSPE) technique, has been described by Prahalad K. Vasudev in his July 1987 IEEE Circuits and Devices article described above. This process is also described in an article co-authored by Mr. Vasudev with Anil Gupta in their February 1983 article titled "Recent Advances in Heteroepitaxial Silicon-on-Insulator Technology, Part I" found in Solid State Technology, Volume 26, Number 2, pp. 104-109.
While the DSPE process is a way in which to improve bipolar junction transistors fabricated in silicon-on-sapphire, further improvements are considered desirable to make such devices practical for use in operational amplifiers.